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C8051F360 Datasheet(PDF) 268 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 268 Page - Silicon Laboratories |
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268 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 268 Rev. 1.0 22.2.2. Software Timer (Compare) Mode In Software Timer mode, the PCA0 counter/timer is compared to the module's 16-bit capture/compare reg- ister (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic ‘1’ and an interrupt request is generated if CCF interrupts are enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt service routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn register enables Software Timer mode. Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/ Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’. Match 16-bit Comparator PCA0H PCA0CPHn Enable PCA0L PCA Timebase PCA0CPLn 00 00 PCA Interrupt 0 1 x ENB ENB 0 1 Write to PCA0CPLn Write to PCA0CPHn Reset PCA0CPMn P W M 1 6 n E C O M n E C C F n T O G n P W M n C A P P n C A P N n M A T n x PCA0CN C F C R C C F 0 C C F 2 C C F 1 C C F 5 C C F 4 C C F 3 Figure 22.5. PCA Software Timer Mode Diagram |
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