C8051F360 datasheet(270/288 Pages) SILABS

270 / 288 page

C8051F360/1/2/3/4/5/6/7/8/9

270

Rev. 1.0

22.2.4. Frequency Output Mode

Frequency Output Mode produces a programmable-frequency square wave on the module’s associated

CEXn pin. The capture/compare module high byte holds the number of PCA clocks to count before the out-

put is toggled. The frequency of the square wave is then defined by Equation 22.1.

Equation 22.1. Square Wave Frequency Output

Fsqr

FPCA

2 PCA0CPHn

-----------------------------------------

Note: A value of 0x00 in the PCA0CPHn register is equal to 256 for this equation.

Where FPCA is the frequency of the clock selected by the CPS2–0 bits in the PCA mode register,

PCA0MD. The lower byte of the capture/compare module is compared to the PCA0 counter low byte; on a

match, CEXn is toggled and the offset held in the high byte is added to the matched value in PCA0CPLn.

Frequency Output Mode is enabled by setting the ECOMn, TOGn, and PWMn bits in the PCA0CPMn reg-

ister.

Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/

Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit

to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.

8-bit

Comparator

PCA0L

Enable

PCA Timebase

00 0

match

PCA0CPMn

PCA0CPHn

8-bit Adder

PCA0CPLn

Adder

Enable

CEXn

Crossbar

Port I/O

Toggle

TOGn

Figure 22.7. PCA Frequency Output Mode

C8051F360 Datasheet(PDF) 270 Page - Silicon Laboratories