TMPR3911 datasheet(53/462 Pages) TOSHIBA

53 / 462 page

Chapter 1 TMPR3911/12 Overview

1-11

1.2

References

(1) MIPS RISC Architecture, Gerry Kane and Joe Heinrich, Prentice Hall, 1992

This book is a comprehensive reference for the MIPS RISC Instruction Set Architecture (ISA). This

book also describes implementation-specific architectural features for each of the MIPS RISC processor

families. This book includes descriptions of CPU architecture, memory management, cache

architecture, instruction set summary, exception processing, floating-point unit, and assembly language

programming.

(2) PC Card Standard, Release 2.01, Personal Computer Memory Card International Association,

November 1992

This document provides a description of the standard for PC Card interchangeability. This includes card

and socket physical and mechanical specifications, connector pin description and electrical interface

specifications, card data formats and header organization, and execute in place specifications. This is

not a General Magic document, and availability of this document is controlled by the Personal

Computer Memory Card International Association.

(3) TX39 Family Users Manual, TOSHIBA

(4) Computer Architecture: A Quantitative Approach

Second Edition

John L Hennessy & David A Patterson

Morgan Kaufmann Publishers, Inc.

ISBN 1-55860-329-8

(5) See MIPS Run

Dominic Sweetman

Morgan Kaufmann Publishers, Inc.

ISBN 1-55860-410-3

(6) MIPS Technologies Inc. Publications

http://www.mips.com/publications/

(7) SGI Document Archive

ftp://sgigate.sgi.com/pub/doc/

TMPR3911 Datasheet(PDF) 53 Page - Toshiba Semiconductor