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TMPR3911 Datasheet(PDF) 68 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 68 Page - Toshiba Semiconductor |
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68 / 462 page ![]() Chapter 2 Pin Descriptions 2-14 2.3 Pin Mode This section contains tables summarizing various aspects of the pin usage for the TMPR3911/12. Table 2.3.1 lists the standard versus multi-function usage for each TMPR3911/12 pin, if applicable. The column showing the multi-function select indicates the corresponding bit in the MIOSEL register, as well as the default configuration of each multi-function pin during reset. The “Bus Arb State” column shows which pins are tri-stated whenever the DGRNT* signal is asserted in response to a DREQ* (external bus arbitration request). Table 2.3.1 TMPR3911/12 Standard and Multi-Function Pin Mode (1/3) multi-function select 1 = multi-function mode 0 = standard function mode TMPR3911/12 pin standard function (I = input, O = output) multi-function MIOSEL reset state Bus Arb State D[31:0] D[31:0] (I/O) – – – Hi-Z A[12:0] A[12:0] (I/O) – – – Hi-Z ALE ALE (O) – – – Hi-Z RD* RD* (O) – – – Hi-Z WE* WE* (O) – – – Hi-Z CAS0* (WE0*) CAS0* (O) – – – Hi-Z CAS1* (WE1*) CAS1* (O) – – – Hi-Z CAS2* (WE2*) CAS2* (O) – – – Hi-Z CAS3* (WE3*) CAS3* (O) – – – Hi-Z RAS0* RAS0* (O) – – – Hi-Z RAS1* (DCS1)* RAS1* (O) – – – Hi-Z DCS0* DCS0* (O) – – – Hi-Z DCKE DCKE (O) – – – Hi-Z DCLKIN DCLKIN (I) – – – – DCLKOUT DCLKOUT (O) – – – Hi-Z DQMH DQMH (O) – – – Hi-Z DQML DQML (O) – – – Hi-Z DREQ* DREQ* (I) MIO[27] MIOSEL[27] 0 – DGRNT* DGRNT* (O) MIO[26] MIOSEL[26] 0 – SYSCLKIN SYSCLKIN (I) – – – – SYSCLKOUT SYSCLKOUT (O) – – – – C32KIN C32KIN (I) – – – – C32KOUT C32KOUT (O) – – – – BC32K BC32K (O) MIO[25] MIOSEL[25] 1 – VDAT[3] VDAT[3] (O) – – – – VDAT[2] VDAT[2] (O) – – – – VDAT[1] VDAT[1] (O) – – – – VDAT[0] VDAT[0] (O) – – – – CP CP (O) – – – – LOAD LOAD (O) – – – – DF DF (O) – – – – FRAME FRAME (O) – – – – DISPON DISPON (O) – – – – PWRCS PWRCS (O) – – – – PWRINT PWRINT (I) – – – – |
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