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VNF9D5F Datasheet(PDF) 104 Page - STMicroelectronics

Part # VNF9D5F
Description  2-channel high-side driver with STi²Fuse protection for automotive power distribution applications
PDF  108 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF9D5F Datasheet(HTML) 104 Page - STMicroelectronics

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List of tables
Table 1.
Pin functionality description ............................................................. 4
Table 2.
Operating modes .................................................................... 7
Table 3.
Frame 1 (write CTRL 0x0001) ........................................................... 9
Table 4.
Frame 1: read (ROM) 0x3F 0x-- ......................................................... 10
Table 5.
Frame 1 (write CTRL0x4000) .......................................................... 10
Table 6.
Frame 2 (write CTRL0x0800) .......................................................... 10
Table 7.
Frame 1 (write CTRL 0x4800) - Normal mode to pre-standby mode ................................ 11
Table 8.
Frame 2 (write CTRL 0x8000)–Normal mode to pre-standby mode................................. 11
Table 9.
Nominal time ...................................................................... 15
Table 10.
Nominal current .................................................................... 15
Table 11.
DINx pin functionality ................................................................ 18
Table 12.
FIXED_DROP table ................................................................. 18
Table 13.
SPI signal description ................................................................ 21
Table 14.
Command byte .................................................................... 23
Table 15.
Input data byte 1 ................................................................... 23
Table 16.
Input data byte 2 ................................................................... 23
Table 17.
Global status byte .................................................................. 23
Table 18.
Output data byte 1 .................................................................. 23
Table 19.
Output data byte 2 .................................................................. 23
Table 20.
Operating codes ................................................................... 23
Table 21.
0xFF: SW_Reset ................................................................... 25
Table 22.
Clear all status registers (RAM access).................................................... 26
Table 23.
Global Status Byte (GSB) ............................................................. 26
Table 24.
Global Status Byte .................................................................. 26
Table 25.
RAM memory map .................................................................. 27
Table 26.
ROM memory map.................................................................. 28
Table 27.
SPI Mode ........................................................................ 29
Table 28.
SPI Burst Read .................................................................... 29
Table 29.
SPI Data Length ................................................................... 29
Table 30.
SPI Data Consistency Check........................................................... 29
Table 31.
Output control truth table.............................................................. 30
Table 32.
Phase shift configuration.............................................................. 31
Table 33.
OTP memory map - MCUext = 1 ........................................................ 31
Table 34.
OTP memory map - MCUext = 0 ........................................................ 32
Table 35.
Truth table ....................................................................... 32
Table 36.
Switching slopes ................................................................... 33
Table 37.
Programmable tblanking values .......................................................... 37
Table 38.
Registers ........................................................................ 54
Table 39.
Sampling mode .................................................................... 55
Table 40.
ADC Configurations registers .......................................................... 57
Table 41.
Status register ..................................................................... 59
Table 42.
VDSHSR state in a permanent off-state condition.............................................. 60
Table 43.
Blanking window values configurations .................................................... 63
Table 44.
ADC built in self-test................................................................. 68
Table 45.
ADC BIST conversion results .......................................................... 68
Table 46.
I²t built in self-test................................................................... 69
Table 47.
Absolute maximum ratings ............................................................ 70
Table 48.
Thermal data...................................................................... 71
Table 49.
DC characteristics .................................................................. 71
Table 50.
AC characteristics (SDI, SCK, CSN, SDO) ................................................. 72
Table 51.
Dynamic characteristics .............................................................. 73
Table 52.
Power section ..................................................................... 75
VNF9D5F
List of tables
DS13946 - Rev 8
page 104/108



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