C167CS datasheet(248/517 Pages) INFINEON

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C167CS

Derivatives

The General Purpose Timer Units

User’s Manual

10-20

V2.0, 2000-07

Auxiliary Timer in Capture Mode

Capture mode for the auxiliary timers T2 and T4 is selected by setting bit field TxM in the

respective register TxCON to ‘101B’. In capture mode the contents of the core timer are

latched into an auxiliary timer register in response to a signal transition at the respective

auxiliary timer’s external input pin TxIN. The capture trigger signal can be a positive, a

negative, or both a positive and a negative transition.

The two least significant bits of bit field TxI are used to select the active transition (see

Table 10-8), while the most significant bit TxI.2 is irrelevant for capture mode. It is

recommended to keep this bit cleared (TxI.2 = ‘0’).

Note: When programmed for capture mode, the respective auxiliary timer (T2 or T4)

stops independent of its run flag T2R or T4R.

Figure 10-14 GPT1 Auxiliary Timer in Capture Mode

Upon a trigger (selected transition) at the corresponding input pin TxIN the contents of

the core timer are loaded into the auxiliary timer register and the associated interrupt

request flag TxIR will be set.

Note: The direction control bits for T2IN and T4IN must be set to ‘0’, and the level of the

capture trigger signal should be held high or low for at least 8

fCPU cycles before

it changes to ensure correct edge detection.

Capture Register Tx

Core Timer T3

Up/Down

Edge

Select

T3OTL

Interrupt

Request

T3OE

T3OUT

TxIN

Input

Clock

Interrupt

Request

MCB02038

TxI

x = 2.4

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