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C167CS Datasheet(PDF) 252 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 252 Page - Infineon Technologies AG |
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252 / 517 page  C167CS Derivatives The General Purpose Timer Units User’s Manual 10-24 V2.0, 2000-07 10.2.1 GPT2 Core Timer T6 The operation of the core timer T6 is controlled by its bitaddressable control register T6CON. T6CON Timer 6 Control Register SFR (FF48H/A4H) Reset Value: 0000H 15 14 13 12 11 10 9876 543210 T6 SR - --- T6 OTL T6 OE T6 UDE T6 UD T6R T6M T6I rw - - - - rwh rw rw rw rw rw rw Bit Function T6I Timer 6 Input Selection Depends on the Operating Mode, see respective sections. T6M Timer 6 Mode Control (Basic Operating Mode) 000: Timer Mode 001: Counter Mode 010: Gated Timer with Gate active low 011: Gated Timer with Gate active high 1XX: Reserved. Do not use this combination. T6R Timer 6 Run Bit 0: Timer/Counter 6 stops 1: Timer/Counter 6 runs T6UD Timer 6 Up/Down Control1) 1) For the effects of bits T6UD and T6UDE refer to the Table 10-9. T6UDE Timer 6 External Up/Down Enable1) T6OE Alternate Output Function Enable 0: Alternate Output Function Disabled 1: Alternate Output Function Enabled T6OTL Timer 6 Output Toggle Latch Toggles on each overflow/underflow of T6. Can be set or reset by software. T6SR Timer 6 Reload Mode Enable 0: Reload from register CAPREL Disabled 1: Reload from register CAPREL Enabled |
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