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C167CS Datasheet(PDF) 254 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 254 Page - Infineon Technologies AG |
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254 / 517 page ![]() C167CS Derivatives The General Purpose Timer Units User’s Manual 10-26 V2.0, 2000-07 Timer 6 Output Toggle Latch An overflow or underflow of timer T6 will clock the toggle bit T6OTL in control register T6CON. T6OTL can also be set or reset by software. Bit T6OE (Alternate Output Function Enable) in register T6CON enables the state of T6OTL to be an alternate function of the external output pin T6OUT. For that purpose, a ‘1’ must be written into the respective port data latch and pin T6OUT must be configured as output by setting the respective direction control bit to ‘1’. If T6OE = ‘1’, pin T6OUT then outputs the state of T6OTL. If T6OE = ‘0’ pin T6OUT can be used as general purpose IO pin. In addition, T6OTL can be used in conjunction with the timer over/underflows as an input for the counter function of the auxiliary timer T5. For this purpose, the state of T6OTL does not have to be available at pin T6OUT, because an internal connection is provided for this option. An overflow or underflow of timer T6 can also be used to clock the timers in the CAPCOM units. For this purpose, there is a direct internal connection between timer T6 and the CAPCOM timers. Timer 6 in Timer Mode Timer mode for the core timer T6 is selected by setting bitfield T6M in register T6CON to ‘000B’. In this mode, T6 is clocked with the internal system clock divided by a programmable prescaler, which is selected by bit field T6I. The input frequency fT6 for timer T6 and its resolution rT6 are scaled linearly with lower clock frequencies fCPU, as can be seen from the following formula: Figure 10-17 Block Diagram of Core Timer T6 in Timer Mode fT6 = fCPU 4 × 2<T6I> rT6 [µs] = fCPU [MHz] 4 × 2<T6I> , Core Timer Tx TxOTL Interrupt Request TxOE TxOUT TxR 2n : 1 Txl EXOR 0 MUX 1 TxEUD TxUDE MCB02028 TxUD f CPU Up/ Down T6EUD = P5.10 x = 6 T6OUT = P3.1 n = 2 … 9 |
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