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C167CS Datasheet(PDF) 249 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 249 Page - Infineon Technologies AG |
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249 / 517 page  C167CS Derivatives The General Purpose Timer Units User’s Manual 10-21 V2.0, 2000-07 10.1.3 Interrupt Control for GPT1 Timers When a timer overflows from FFFFH to 0000H (when counting up), or when it underflows from 0000H to FFFFH (when counting down), its interrupt request flag (T2IR, T3IR or T4IR) in register TxIC will be set. This will cause an interrupt to the respective timer interrupt vector (T2INT, T3INT or T4INT) or trigger a PEC service, if the respective interrupt enable bit (T2IE, T3IE or T4IE in register TxIC) is set. There is an interrupt control register for each of the three timers. Note: Please refer to the general Interrupt Control Register description for an explanation of the control fields. T2IC Timer 2 Intr. Ctrl. Reg. SFR (FF60H/B0H) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 - T2IR T2IE ILVL GLVL - - - - - - - - rwh rw rw rw T3IC Timer 3 Intr. Ctrl. Reg. SFR (FF62H/B1H) Reset Value: - - 00H 15 14 13 12 11 10 98765 43210 - T3IR T3IE ILVL GLVL - - - - - - - - rwh rw rw rw T4IC Timer 4 Intr. Ctrl. Reg. SFR (FF64H/B2H) Reset Value: - - 00H 15 14 13 12 11 10 9876 543210 - T4IR T4IE ILVL GLVL - - - - - - - - rwh rw rw rw |
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