38D2 datasheet(127/136 Pages) RENESAS

127 / 136 page

Rev.3.02

Apr 10, 2008

Page 127 of 131

REJ03B0177-0302

38D2 Group

2. Executing STP Instruction

Execution of the STP instruction sets the LCD enable bit (bit 3 of

the LCD mode register) and bits 0 to 5 and bit 7 of the LCD

power control register to “0” and the LCD panel turns off. To

make the LCD panel turn on after returning from the stop mode,

set these bits to “1”.

3. VL3 Pin

To use the LCD drive control circuit while VL3 is set to the

voltage equal to VCC, apply the VCC voltage to the VL3 pin and

write “1” to the VL3 connection bit of LCD power control

4. LCD Drive Power Supply

Power supply capacitor may be insufficient with the division

resistance for LCD power supply, and the characteristic of the

LCD panel. In this case, there is the method of connecting the

bypass capacitor about 0.1

−0.33μF to VL1−VL3 pins. The

example of a strengthening measure of the LCD drive power

supply is shown below.

Fig. 105 Strengthening measure example of LCD drive

power supply

Notes on ROM Correction Function

1. Returning to Main Program

To return to the main program from the correction program, use

the JMP instruction (3-byte instruction).

2. Using ROM Correction Function

If the ROM correction function is used, be sure to enable the

ROM correction enable bit after setting the ROM correction

3. Address

Do not set addresses other than the ROM area in the ROM

correction address registers. Also, do not set the same address in

the ROM correction address 1 register and the ROM correction

address 2 register.

4. ROM Correction Process

Include the ROM correction process in the program beforehand.

5. Using No ROM Correction Function

If the ROM correction function is not used, the ROM correction

vector can be used as normal RAM/ROM. When using as normal

RAM/ROM, be sure to set bits 1 and 0 of the ROM correction

enable register to “0” (disabled).

Notes on Clock Generating Circuit

1. Oscillation Circuit Constants

The oscillation circuit constants vary depending on the resonator.

Use values recommended by the oscillator manufacturer.

A feed-back resistor is implemented between the XIN and XOUT

pins (an external feed-back resistor may be required depending

on conditions). As no feed-back resistor is implemented between

XCIN and XCOUT, add a feedback resistor of about 10 M

Ω.

2. Transition between Modes

When the MCU transits between on-chip oscillator mode, XIN

mode, or low-speed mode, both the XIN and XCIN oscillations

must be stabilized. Be especially careful when turning the power

on and returning from stop mode. Refer to the clock state

transition diagram for a transition between each mode. Also, set

the frequency in the condition that f(XIN)

≥ 3 × (XCIN).

When XIN mode is not used (the XIN-XOUT oscillation or

external clock input to XIN is not performed), connect XIN to

VCC through a resistor.

3. Oscillation Stabilization

Before executing the STP instruction, set the values * to generate

the wait time required for oscillation stabilization to timer 1 latch

and timer 2 latch (low-order 8 bits of timer 1 and high-order 8

bits of timer 2).

*Referential values

(Set values according to your oscillator and system)

• OSCSEL = “L” in the flash memory and QzROM versions:

..................................................................... 000516 or more

•OSCSEL = “H” in the QzROM version:

.....................................................................01FF16 or more

4. Low-Speed Mode, XIN Mode

To use low-speed mode or XIN mode, wait until oscillation

stabilizes after enabling the XIN-XOUT and XCIN-XCOUT

oscillation, then switch to the mode.

• Connect by the shortest

possible wiring.

• Connect the bypass capacitor

to the VL1

−VL3 pins as short

as possible.

(Referential value:0.1

−0.33 μF)

VL3

VL2

VL1

38D2 Datasheet(PDF) 127 Page - Renesas Technology Corp

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