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SH7101 Datasheet(PDF) 254 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 254 Page - Renesas Technology Corp |
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254 / 560 page ![]() Section 8 Multifunction Timer Pulse Unit (MTU) Rev.1.00 Sep. 18, 2008 Page 220 of 522 REJ09B0069-0100 Counter clear signal Write signal Address P φ TCNT address TCNT TCNT write cycle T1 T2 N H'0000 Figure 8.70 Contention between TCNT Write and Clear Operations 8.7.5 Contention between TCNT Write and Increment Operations If incrementing occurs in the T2 state of a TCNT write cycle, the TCNT write takes precedence and TCNT is not incremented. Figure 8.71 shows the timing in this case. TCNT input clock Write signal Address P φ TCNT address TCNT TCNT write cycle T1 T2 N M TCNT write data Figure 8.71 Contention between TCNT Write and Increment Operations |
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