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SH7101 Datasheet(PDF) 257 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 257 Page - Renesas Technology Corp

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Section 8 Multifunction Timer Pulse Unit (MTU)
Rev.1.00 Sep. 18, 2008 Page 223 of 522
REJ09B0069-0100
P
φ
Address
Write signal
Compare match
signal
Compare match
buffer signal
TGR write cycle
T1
T2
Buffer register
address
N
NM
Buffer register write data
Buffer register
TGR
Figure 8.74 Contention between Buffer Register Write and Compare Match
(Channels 3 and 4)
8.7.8
Contention between TGR Read and Input Capture
If an input capture signal is generated in the T1 state of a TGR read cycle, the data that is read will
be that in the buffer after input capture transfer.
Figure 8.75 shows the timing in this case.



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