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HD6433644R Datasheet(PDF) 167 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 167 Page - Renesas Technology Corp |
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167 / 549 page ![]() Section 6 ROM Rev. 6.00 Sep 12, 2006 page 147 of 526 REJ09B0326-0600 Examples: Sample calculations when executing a program in on-chip memory (RAM) at an operating frequency of 6 MHz a ( φ) = × 9 = 10.8 ≈ 10 = H'000A b ( φ) = × 4 = 4.8 ≈ 5 = H'05 c ( φ) = × 2 = 2.4 ≈ 3 = H'03 d ( φ) = × 1953 = 2343.6 ≈ 2343 = H'0927 6 5 6 5 6 5 6 5 Table 6.12 Watchdog Timer Overflow Interval Settings (Set Value of #e for Operating Frequencies) Oscillation Frequency fOSC = 16 MHz fOSC = 10 MHz fOSC = 8 MHz fOSC = 2 MHz Operating Frequency Variable φφφφ = 8 MHz φφφφ = 5 MHz φφφφ = 4 MHz φφφφ = 1 MHz e ( φ) H'9B H'DF H'E5 H'F7 6.7.7 Prewrite-Verify Mode Prewrite-verify mode is a verify mode used to all bits to equalize their threshold voltages before erasure. To program all bits, write H'00 in accordance with the prewrite algorithm shown in figure 6.15. Use this procedure to set all data in the flash memory to H'00 after programming. After the necessary programming time has elapsed, exit program mode (by clearing the P bit to 0) and select prewrite-verify mode (leave the P, E, PV, and EV bits all cleared to 0). In prewrite-verify mode, a prewrite-verify voltage is applied to the memory cells at the read address. If the flash memory is read in this state, the data at the read address will be read. After selecting prewrite-verify mode, wait at least 4 µs before reading. Note: For a sample prewriting program, see the prewrite subroutine in the sample erasing program. |
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