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HD6433644R Datasheet(PDF) 255 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 255 Page - Renesas Technology Corp |
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255 / 549 page ![]() Section 9 Timers Rev. 6.00 Sep 12, 2006 page 235 of 526 REJ09B0326-0600 Contention between Compare Match A and B: If compare match A and B occur simultaneously, any conflict between the output selections for compare match A and compare match B is resolved by following the priority order in table 9.12. Table 9.12 Timer Output Priority Order Output Setting Priority Toggle output High 1 output 0 output No change Low Internal Clock Switching and Counter Operation: Depending on the timing, TCNTV may be incremented by a switch between different internal clock sources. Table 9.13 shows the relation between internal clock switchover timing (by writing to bits CKS1 and CKS0) and TCNTV operation. When TCNTV is internally clocked, an increment pulse is generated from the falling edge of an internal clock signal, which is divided from the system clock ( φ). For this reason, in a case like No. 3 in table 9.13 where the switch is from a high clock signal to a low clock signal, the switchover is seen as a falling edge, causing TCNTV to increment. TCNTV can also be incremented by a switch between internal and external clocks. |
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