HD6433644R datasheet(312/549 Pages) RENESAS

312 / 549 page

Section 10 Serial Communication Interface

Rev. 6.00 Sep 12, 2006 page 292 of 526

REJ09B0326-0600

Pin Configuration

Table 10.4 shows the SCI3 pin configuration.

Table 10.4 Pin Configuration

Name

Abbr.

I/O

Function

SCI3 clock

SCK3

I/O

SCI3 clock input/output

SCI3 receive data input

RXD

Input

SCI3 receive data input

SCI3 transmit data output

TXD

Output

SCI3 transmit data output

Table 10.5 shows the SCI3 register configuration.

Table 10.5 Registers

Name

Abbr.

R/W

Initial Value

Address

Serial mode register

SMR

R/W

H'00

H'FFA8

Bit rate register

BRR

R/W

H'FF

H'FFA9

Serial control register 3

SCR3

R/W

H'00

H'FFAA

Transmit data register

TDR

R/W

H'FF

H'FFAB

Serial status register

SSR

R/W

H'84

H'FFAC

Receive data register

RDR

H'00

H'FFAD

Transmit shift register

TSR

Protected



Receive shift register

RSR

Protected



Bit rate counter

BRC

Protected



10.3.2

Receive Shift Register (RSR)

Bit

Read/Write



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