HD6433644R datasheet(313/549 Pages) RENESAS

313 / 549 page

Section 10 Serial Communication Interface

Rev. 6.00 Sep 12, 2006 page 293 of 526

REJ09B0326-0600

RSR is a register used to receive serial data. Serial data input to RSR from the RXD pin is set in

the order in which it is received, starting from the LSB (bit 0), and converted to parallel data.

When one byte of data is received, it is transferred to RDR automatically.

RSR cannot be read or written directly by the CPU.

Receive Data Register (RDR)

Bit

RDR7

RDR6

RDR5

RDR4

RDR3

RDR2

RDR1

RDR0

Initial value

Read/Write

RDR is an 8-bit register that stores received serial data.

When reception of one byte of data is finished, the received data is transferred from RSR to RDR,

and the receive operation is completed. RSR is then enabled for reception. RSR and RDR are

double-buffered, allowing consecutive receive operations.

RDR is a read-only register, and cannot be written by the CPU.

RDR is initialized to H'00 upon reset, and in standby, watch, subactive, or subsleep mode.

Transmit Shift Register (TSR)

Bit

Read/Write



TSR is a register used to transmit serial data. Transmit data is first transferred from TDR to TSR,

and serial data transmission is carried out by sending the data to the TXD pin in order, starting

from the LSB (bit 0). When one byte of data is transmitted, the next byte of transmit data is

transferred from TDR to TSR, and transmission started, automatically. Data transfer from TDR to

TSR is not performed if no data has been written to TDR (if bit TDRE is set to 1 in the serial

status register (SSR)).

TSR cannot be read or written directly by the CPU.

HD6433644R Datasheet(PDF) 313 Page - Renesas Technology Corp