SH7021 datasheet(352/509 Pages) RENESAS

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12.3.2

Operation in the Interval Timer Mode

To use the WDT as an interval timer, clear WT/

IT to 0 and set TME to 1. An interval timer

interrupt (ITI) is generated each time the timer counter overflows. This function can be used to

generate interval timer interrupts at regular intervals (figure 12.5).

H'FF

TCNT value

H'00

WT/IT = 0

TME = 1

ITI

Time

Overflow

Figure 12.5 Operation in the Interval Timer Mode

12.3.3

Operation in the Standby Mode

The watchdog timer has a special function to clear the standby mode with an NMI interrupt. When

using the standby mode, set the WDT as described below.

Transition to the Standby Mode: The TME bit in the TCSR must be cleared to 0 to stop the

watchdog timer counter before it enters the standby mode. The chip cannot enter the standby mode

while the TME bit is set to 1. Set bits CKS2–CKS0 so that the counter overflow interval is equal

to or longer than the oscillation settling time. See section 20.3, AC Characteristics, for the

oscillation settling time.

Recovery from the Standby Mode: When an NMI request signal is received in standby mode,

the clock oscillator starts running and the watchdog timer starts counting at the rate selected by

bits CKS2–CKS0 before the standby mode was entered. When the TCNT overflows (changes

from H'FF–H'00), the system clock (

φ) is presumed to be stable and usable; clock signals are

supplied to the entire chip and the standby mode ends.

For details on the standby mode, see section 19, Power Down States.

SH7021 Datasheet(PDF) 352 Page - Renesas Technology Corp