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SH7021 Datasheet(PDF) 348 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 348 Page - Renesas Technology Corp |
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348 / 509 page  RENESAS 332 • Bit 7 (watchdog timer overflow (WOVF)): WOVF indicates that the TCNT has overflowed (H'FF → H'00) in the watchdog timer mode. It is not set in the interval timer mode. Bit 7: WOVF Description 0 No TCNT overflow in watchdog timer mode (initial value) Cleared when software reads WOVF, then writes 0 in WOVF 1 Set by TCNT overflow in watchdog timer mode • Bit 6 (reset enable (RSTE)): RSTE selects whether to reset the chip internally if the TCNT overflows in the watchdog timer mode. Bit 6: RSTE Description 0 Not reset when TCNT overflows (initial value). LSI not reset internally, but TCNT and TCSR reset within WDT. 1 Reset when TCNT overflows • Bit 5 (reset select (RSTS)): RSTS selects the type of internal reset generated if the TCNT overflows in the watchdog timer mode. Bit 5: RSTS Description 0 Power-on reset initial value) 1 Manual reset • Bits 4–0 (reserved): These bits always read as 1. The write value should always be 1. |
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