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SH7021 Datasheet(PDF) 153 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 153 Page - Renesas Technology Corp |
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153 / 509 page ![]() RENESAS 135 Table 8.9 Relationship between Multiplex Shift Count Bits (MXC1, MXC0) and Address Multiplexing Shift Amount 8 bits Shift Amount 9 bits Shift Amount 10 bits Output Pin Output Row Address Output Column Address Output Row Address Output Column Address Output Row Address Output Column Address A21 A21 A21 A21 A20 A20 A20 A20 A19 Undefined A19 A19 A19 A18 Value A18 Undefined A18 A18 A17 A17 Value A17 Undefined A17 A16 A16 A16 Value A16 A15 A23 A15 A15 A15 A14 A22 A14 A23 A14 A14 A13 A21 A13 A22 A13 A23 A13 A12 A20 A12 A21 A12 A22 A12 A11 A19 A11 A20 A11 A21 A11 A10 A18 A10 A19 A10 A20 A10 A9 A17 A9 A18 A9 A19 A9 A8 A16 A8 A17 A8 A18 A8 A7 A15 A7 A16 A7 A17 A7 A6 A14 A6 A15 A6 A16 A6 A5 A13 A5 A14 A5 A15 A5 A4 A12 A4 A13 A4 A14 A4 A3 A11 A3 A12 A3 A13 A3 A2 A10 A2 A11 A2 A12 A2 A1 A9 A1 A10 A1 A11 A1 A0 A8 A0 A9 A0 A10 A0 Notes: The MXC1=1, MX0=1 setting is reserved. Do not use it. For example, when MXC1 and MXC0 are set to 00 and an 8-bit shift is selected, the A23–A8 address bit values are output to pins A15–A0 as row addresses. The values for A21–A16 are undefined. The values of bits address A21–A0 are output to pins A21–A0 as column addresses. Figure 8.16 depicts address multiplexing with an 8-bit shift. |
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