 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
SH7021 Datasheet(PDF) 224 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
SH7021 Datasheet(HTML) 224 Page - Renesas Technology Corp |
|
|
224 / 509 page  RENESAS 207 9.4.2 Example of DMA Transfer between On-Chip SCI and External Memory In this example, receive data of on-chip serial communications interface (SCI) channel 0 is transferred to external memory using DMAC channel 3. Table 9.8 shows the transfer conditions and register settings. Table 9.8 Transfer Conditions and Register Settings for Transfer between On-Chip SCI and External Memory Transfer Conditions Register Setting Transfer source: RDR0 of on-chip SCI0 SAR3 H'FFFFEC5 Transfer destination: external memory DAR3 Destination address Number of transfers: 64 TCR3 H'0040 Transfer destination address: incremented CHCR3 H'4405 Transfer source address: fixed Transfer request source (transfer request signal): SCI0 (RXI0) Bus mode: cycle steal Transfer unit: byte DEI interrupt request generated at end of transfer (channel 3 enabled for transfer Channel priority order: fixed (0 > 3 > 2 > 1) (all channels transfer enabled) DMAOR H'0001 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
