SH7021 datasheet(280/509 Pages) RENESAS

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264 RENESAS

Reset-Synchronized PWM Mode Operation: Figure 10.32 shows an example of operation in the

reset-synchronized PWM mode. TCNT3 operates as an upcounter that is cleared to H'0000 at

compare match with GRA3. TCNT4 runs independently and is isolated from GRA4 and GRB4.

The PWM waveform outputs toggle at each compare match (GRB3, GRA3, and GRB4 with

TCNT3) and when the counter is cleared.

See section 10.4.8, Buffer Mode, for details on simultaneously setting reset-synchronized PWM

mode and buffer operation.

GRA3

GRB3

GRB4

GRA4

TIOCA3

TIOCB3

TIOCA4

TOCXA4

TIOCB4

TOCXB4

Counter cleared at GRA3 compare match

Time

TCNT value

Figure 10.32 Reset-Synchronized PWM Mode Operation Example 1

10.4.6

Complementary PWM Mode

In the complementary PWM mode, three pairs of complementary, non-overlapping, positive and

negative PWM waveforms can be obtained using channels 3 and 4. In complementary PWM

mode, the TIOCA3, TIOCB3, TIOCA4, TOCXA4, TIOCB4, and TOCXB4 pins automatically

become PWM output pins and TCNT3 and TCNT4 become upcounters. Table 10.14 shows the

PWM output pins used and table 10.15 shows the settings of the registers used.

SH7021 Datasheet(PDF) 280 Page - Renesas Technology Corp