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SH7021 Datasheet(PDF) 282 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 282 Page - Renesas Technology Corp |
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282 / 509 page ![]() 266 RENESAS 5. GRA3 is the waveform period register. Set the upper limit of TCNT3–1*. Set the transition times of the PWM output waveforms in GRB3, GRA4, and GRB4. Set times within the compare match range of TCNT3 and TCNT4. T ≤ X (X: initial setting of GRB3, GRA4, and GRB4; T: initial setting of TCNT3) Note: GRA3 = [cycle count/2] + [count of non-overlaps] – 2cyc=[upper limit of TCNT3] – 1 6. Set the STR3 and STR4 bits in the TSTR to 1 to let TCNT3 and TCNT4 start counting. (1) (2) (3) (4) (5) (6) Set general registers Start counting Complementary PWM mode Stop counting Select counter clock Set TCNT Complementary PWM mode Select complementary PWM mode Note To re-engage the complementary PWM mode after it has been aborted, start settings from step 1. Figure 10.33 Procedure for Selecting the Complementary PWM Mode Complementary PWM Mode Operation: Figure 10.34 shows an example of operation in the complementary PWM mode. TCNT3 and TCNT4 operate as up/downcounters, counting down from compare match of TCNT3 and GRA3 and counting up when TCNT4 underflows. PWM waveforms are output by repeated compare matches with each of the general registers in the |
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