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SH7021 Datasheet(PDF) 290 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 290 Page - Renesas Technology Corp |
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290 / 509 page  274 RENESAS TCLKA TCLKB Phase differential Phase differential, overlap: 1.5 cycles minimum Pulse width: 2.5 cycles minimum Phase differential Pulse width Pulse width Overlap Overlap Figure 10.44 Phase Differentials, Overlap and Pulse Width in the Phase Counting Mode 10.4.8 Buffer Mode In the buffer mode, the buffer operation functions differ depending on whether the general registers are set to output compare or input capture, the reset-synchronized PWM mode, or complementary PWM mode. The buffer mode is a function of channels 3 and 4 only. Buffer operations set this way function as follows. GR is an Output Compare Register: The value of the buffer registers of a channel is transferred to the GR when the channel experiences a compare match. This is illustrated in figure 10.45. BR GR Comparator TCNT Compare match signal Figure 10.45 Compare Match Buffer Operation GR is an Input Capture Register: TCNT values are transferred to GR when input capture occurs and the value previously stored in GR is transferred to BR. This operation is illustrated in figure 10.46. |
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