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R8C/15 Datasheet(PDF) 221 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 221 Page - Renesas Technology Corp |
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221 / 277 page  R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 209 of 253 REJ09B0164-0210 18.4.4 Status Register The status register indicates the operating status of the flash memory and whether an erasing or programming operation completes normally or in error. Status of the status register can be read by the FMR00, FMR06, and FMR07 bits in the FMR0 register. Table 18.5 lists the Status Register. In EW0 mode, the status register can be read in the following cases: • When a given address in the user ROM area is read after writing the read status register command • When a given address in the user ROM area is read after executing the program or block erase command but before executing the read array command. 18.4.4.1 Sequencer Status (SR7 and FMR00 Bits) The sequencer status indicates operating status of the flash memory. SR7 = 0 (busy) during auto programming and auto erasing, and is set to “1” (ready) at the same time the operation completes. 18.4.4.2 Erase Status (SR5 and FMR07 Bits) Refer to 18.4.5 Full Status Check. 18.4.4.3 Program Status (SR4 and FMR06 Bits) Refer to 18.4.5 Full Status Check. • D0 to D7: Indicates the data bus which is read when the read status register command is executed. • The FMR07 (SR5) to FMR06 bits (SR4) are set to “0” by executing the clear status register command. • When the FMR07 bit (SR5) or FMR06 bit (SR4) is set to “1”, the program and block erase command cannot be accepted. Table 18.5 Status Register Status Register Bit FMR0 Register Bit Status Name Contents Value after Reset “0” “1” SR0 (D0) − Reserved −− − SR1 (D1) − Reserved −− − SR2 (D2) − Reserved −− − SR3 (D3) − Reserved −− − SR4 (D4) FMR06 Program status Completed normally Error 0 SR5 (D5) FMR07 Erase status Completed normally Error 0 SR6 (D6) − Reserved −− − SR7 (D7) FMR00 Sequencer status Busy Ready 0 |
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