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R8C/15 Datasheet(PDF) 217 Page - Renesas Technology Corp |
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R8C/15 Datasheet(HTML) 217 Page - Renesas Technology Corp |
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217 / 277 page ![]() R8C/14 Group, R8C/15 Group 18. Flash Memory Version Rev.2.10 Jan 19, 2006 Page 205 of 253 REJ09B0164-0210 18.4.3 Software Commands Software commands are described below. Read or write commands and data from or to in 8-bit units. SRD: Status register data (D7 to D0) WA: Write address (Ensure the address specified in the first bus cycle is the same address as the address specified in the second bus cycle.) WD: Write data (8 bits) BA: Given block address ×: Any specified address in the user ROM area 18.4.3.1 Read Array Command The read array command reads the flash memory. The microcomputer enters read array mode by writing “FFh” in the first bus cycle. If entering the read address after the following bus cycles, the content of the specified address can be read in 8-bit units. Since the microcomputer remains in read array mode until another command is written, the contents of multiple addresses can be read continuously. 18.4.3.2 Read Status Register Command The read status register command reads the status register. If writing “70h” in the first bus cycle, the status register can be read in the second bus cycle. (Refer to 18.4.4 Status Register ) When reading the status register, specify an address in the user ROM area. Do not execute this command in EW1 mode. 18.4.3.3 Clear Status Register Command The clear status register command sets the status register to “0”. If writing “50h” in the first bus cycle, the FMR06 to FMR07 bits in the FMR0 register and SR4 to SR5 in the status register will be set to “0”. Table 18.4 Software Commands Command First Bus Cycle Second Bus Cycle Mode Address Data (D7 to D0) Mode Address Data ( D7 to D0) Read Array Write × FFh Read Status Register Write × 70h Read × SRD Clear Status Register Write × 50h Program Write WA 40h Write WA WD Block Erase Write × 20h Write BA D0h |
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