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MB95430 Datasheet(PDF) 37 Page - fujitsu semiconductor |
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MB95430 Datasheet(HTML) 37 Page - fujitsu semiconductor |
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37 / 56 page  MB95430H Series DS07–12xxx–1E 37 (6) UART/SIO, Serial I/O Timing (VCC = 5.0 V ±10%, AVSS = VSS = 0.0 V, TA = −40°C to +85°C) *: See “(2) Source Clock/Machine Clock” for tMCLK. Parameter Symbol Pin name Condition Value Unit Min Max Serial clock cycle time tSCYC UCK Internal clock operation 4 tMCLK*— ns UCK ↓ → UO time tSLOV UCK, UO −190 +190 ns Valid UI → UCK ↑ tIVSH UCK, UI 2 tMCLK*— ns UCK ↑ → valid UI hold time tSHIX UCK, UI 2 tMCLK*— ns Serial clock “H” pulse width tSHSL UCK External clock operation 4 tMCLK*— ns Serial clock “L” pulse width tSLSH UCK 4 tMCLK*— ns UCK ↓ → UO time tSLOV UCK, UO — 190 ns Valid UI → UCK ↑ tIVSH UCK, UI 2 tMCLK*— ns UCK ↑ → valid UI hold time tSHIX UCK, UI 2 tMCLK*— ns 0.8 V0.8 V 2.4 V tSLOV tIVSH tSHIX 2.4 V 0.8 V UCK UC UI 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC tSCYC • Internal shift clock mode tSLOV tIVSH tSHIX 2.4 V 0.8 V UCK UC UI 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.2 VCC 0.2 VCC 0.8 VCC 0.8 VCC tSLSH tSHSL • External shift clock mode |
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