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MB95430 Datasheet(PDF) 16 Page - fujitsu semiconductor

Part # MB95430
Description  8-bit Microcontrollers
PDF  56 Pages
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Manufacturer  FUJITSU [fujitsu semiconductor]
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Logo FUJITSU - fujitsu semiconductor

MB95430 Datasheet(HTML) 16 Page - fujitsu semiconductor

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MB95430H Series
16
DS07–12xxx–1E
■ BLOCK DIAGRAM
Reset with LVD
Flash with security function
(20 Kbyte)
F2MC-8FX CPU
RAM (496 bytes)
Oscillator
circuit
CR
oscillator
Clock control
On-chip debug
Wild register
External interrupt
Comparator ch. 0
16-bit PPG
stop
trigger
OPAMP
UART/SIO
Port
Port
PF2*1/RST*2
PF1/X1*2
PF0/X0*2
(PG2/X1A*2)
(PG1/X0A*2)
(P00/INT00 to P07/INT07)
Interrupt controller
Buzzer
(P01/BZ, PG1/BZ)
16-bit free-run timer
8/16-bit composite timer
(P05/TO0)
(P06/TO1)
P12*1/EC0, (P07/EC0)
Comparator ch. 3
P67/CMP3_N
P66/CMP3_P
P65/CMP3_O
Comparator ch. 2
P64/CMP2_N
P63/CMP2_P
P76/CMP2_O
(P02/UCK, P76/UCK)
(P03/UO, P65/UO)
(P04/UI, P12*1/UI)
16-bit output compare
(P70/OUT0, PG1/OUT0)
(P73/OUT1, PG2/OUT1)
(P12*1/DBG)
P72/CMP0_N
P71/CMP0_P
Comparator ch. 1
P74/CMP1_P
P75/CMP1_N
I2C
(P04/SCL*3, P12*1/SCL)
(P03/SDA*3, P65/SDA*3)
8/10-bit A/D converter
P00/AN00
P01/AN01
P02/AN02
P03/AN03
P04/AN04
P05/AN05
P06/AN06
P70/CMP0_O
PG2/PPG, (P73/PPG)
PG1/TRG, (P70/TRG)
P60/OPAMP_P
P61/OPAMP_N
P07/AN07
(P71/AN08)
(P72/AN09)
(P73/AN10)
(P74/AN11)
(P75/AN12)
(P63/AN13)
(P64/AN14)
(P65/AN15)
Vcc
Vss
C
*1:
*2:
PF2 and P12 are N-ch open drain pins.
Software option
*3: This pin will work as an N-ch open drain pin during I2C operation.
Note: Pins in parentheses indicate that functions of those pins are shared among different resources.
P62/OPAMP_O
(PG1/ATDG)
P73/CMP1_O
8
8
2
2



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