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MB95430 Datasheet(PDF) 46 Page - fujitsu semiconductor |
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MB95430 Datasheet(HTML) 46 Page - fujitsu semiconductor |
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46 / 56 page  MB95430H Series 46 DS07–12xxx–1E (2) Notes on Using the A/D Converter • External impedance of analog input and its sampling time • The A/D converter has a sample and hold circuit. If the external impedance is too high to keep sufficient sampling time, the analog voltage charged to the capacitor of the internal sample and hold circuit is insufficient, adversely affecting A/D conversion precision. Therefore, to satisfy the A/D conversion precision standard, considering the relationship between the external impedance and minimum sampling time, either adjust the register value and operating frequency or decrease the external impedance so that the sampling time is longer than the minimum value. In addition, if sufficient sampling time cannot be secured, connect a capacitor of about 0.1 µF to the analog input pin. • A/D conversion error As |VCC −VSS| decreases, the A/D conversion error increases proportionately. Note: The values are reference values. 4.5 V ≤ VCC ≤ 5.5 V 4.0 V ≤ VCC < 4.5 V 1.95 k Ω (Max) 8.98 k Ω (Max) 17 pF (Max) VCC R C 17 pF (Max) Comparator Analog input During sampling: ON R C • Analog input equivalent circuit [External impedance = 0 k Ω to 100 kΩ] Minimum sampling time [ μs] Minimum sampling time [ μs] [External impedance = 0 k Ω to 20 kΩ] 100 90 80 70 60 50 40 30 20 10 0 20 18 16 14 12 10 8 6 4 2 0 0246 8 10 12 14 1 02 3 4 ≥ ≥ ≥ (VCC ≥ 4.5 V) (VCC 4.0 V) (VCC 4.5 V) (VCC 4.0 V) • Relationship between external impedance and minimum sampling time |
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