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AM3892 Datasheet(PDF) 287 Page - Texas Instruments |
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AM3892 Datasheet(HTML) 287 Page - Texas Instruments |
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287 / 299 page  AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 8.21 Universal Serial Bus (USB2.0) The device includes two USB2.0 modules which support the Universal Serial Bus Specification Revision 2.0. The following are some of the major USB features that are supported: • USB 2.0 peripheral at high speed (HS: 480 Mbps) and full speed (FS: 12 Mbps) • USB 2.0 host at HS, FS, and low speed (LS: 1.5 Mbps) • Each endpoint (other than endpoint 0, control only) can support all transfer modes (control, bulk, interrupt, and isochronous) • Supports high-bandwidth ISO mode • Supports 16 Transmit (TX) and 16 Receive (RX) endpoints including endpoint 0 • FIFO RAM - 32K endpoint - Programmable size • Includes two integrated PHYs; requires a low-jitter 24-MHz source clock for its PLL • RNDIS-like mode for terminating RNDIS-type protocols without using short-packet termination for support of MSC applications. The USB2.0 modules do not support the following features: • On-chip charge pump (VBUS power must be generated external to the device) • RNDIS mode acceleration for USB sizes that are not multiples of 64 bytes • Endpoint max USB packet sizes that do not conform to the USB2.0 spec (for FS/LS: 8, 16, 32, 64, and 1023 are defined; for HS: 64, 128, 512, and 1024 are defined). For more detailed information on the USB2.0 peripheral, see the USB2.0 chapter in the AM38x Sitara ARM Microprocessors (MPUs) Technical Reference Manual (literature number SPRUGX7). For detailed information on USB board design and layout guidelines, see the USB 2.0 Board Design and Layout Guidelines application report (literature number SPRAAR7) 8.21.1 USB2.0 Peripheral Register Descriptions Table 8-109. USB2.0 Submodules SUBMODULE SUBMODULE NAME ADDRESS OFFSET 0x0000 USBSS registers 0x1000 USB0 controller registers 0x1800 USB1 controller registers 0x2000 CPPI DMA controller registers 0x3000 CPPI DMA scheduler registers 0x4000 CPPI DMA Queue Manager registers Table 8-110. USB Subsystem (USBSS) Registers(1) HEX ADDRESS ACRONYM REGISTER NAME 0x4740 0000 REVREG USBSS REVISION 0x4740 0004 - 0x4740 000C - Reserved 0x4740 0010 SYSCONFIG USBSS SYSCONFIG 0x4740 0014 - 0x4740 001C - Reserved 0x4740 0020 EOI USBSS IRQ_EOI 0x4740 0024 IRQSTATRAW USBSS IRQ_STATUS_RAW 0x4740 0028 IRQSTAT USBSS IRQ_STATUS 0x4740 002C IRQENABLER USBSS IRQ_ENABLE_SET 0x4740 0030 IRQCLEARR USBSS IRQ_ENABLE_CLR (1) USBSS registers contain the registers that are used to control at the global level and apply to all submodules. Copyright © 2010–2011, Texas Instruments Incorporated Peripheral Information and Timings 287 Submit Documentation Feedback Product Folder Link(s): AM3894 AM3892 |
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