90E21 datasheet(31/57 Pages) IDT

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90E21/22/23/24

SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC

January 10, 2012

CS1

Checksum 1

Address: 2CH

Type: Read/Write

Default Value: 0000H

Bit

Name

Description

15 - 0

CS1[15:0]

The CS1 register should be written after the 21H-2BH registers are written. Suppose the high byte and the low byte of the 21H-

2BH registers are shown in below table.

The calculatiion of the CS1 register is as follows:

The low byte of 2CH register is: L2C=MOD(H21+H22+...+H2B+L21+L22+...+L2B, 2^8)

The high byte of 2CH register is: H2C=H21 XOR H22 XOR ... XOR H2B XOR L21 XOR L22 XOR ... XOR L2B

For 90E21/22/23, a part of registers are not used. These registers can be dealed as 0000H in CS calculation.

The 90E21/22/23/24 calculates CS1 regularly. If the value of the CS1 register and the calculation by the 90E21/22/23/24 is differ-

ent when CalStart=8765H, the CalErr[1:0] bits (SysStatus, 01H) are set and the WarnOut and IRQ pins are asserted.

Note:

The readout value of the CS1 register is the calculation by the 90E21/22/23/24, which is different from what is written.

CS1_15

CS1_14

CS1_13

CS1_12

CS1_11

CS1_10

CS1_9

CS1_8

765

432

CS1_7

CS1_6

CS1_5

CS1_4

CS1_3

CS1_2

CS1_1

CS1_0

High Byte

Low Byte

21H

H21

L21

22H

H22

L22

23H

H23

L23

24H

H24

L24

25H

H25

L25

26H

H26

L26

27H

H27

L27

28H

H28

L28

29H

H29

L29

2AH

H2A

L2A

2BH

H2B

L2B

90E21 Datasheet(PDF) 31 Page - Integrated Device Technology

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