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90E21 Datasheet(PDF) 11 Page - Integrated Device Technology

Part # 90E21
Description  Single-Phase High-Performance Wide-Span Energy Metering IC
PDF  57 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

90E21 Datasheet(HTML) 11 Page - Integrated Device Technology

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90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Pin Description
11
January 10, 2012
OSCI
22
I
LVTTL
OSCI: External Crystal Input
An 8.192 MHz crystal is connected between OSCI and OSCO. There is an on-chip 10pF
capacitor, therefore no need of external capacitors.
OSCO
23
O
LVTTL
OSCO: External Crystal Output
An 8.192 MHz crystal is connected between OSCI and OSCO. There is an on-chip 10pF
capacitor, therefore no need of external capacitors.
CF1
CF2
18
19
O
LVTTL
CF1: Active Energy Pulse Output
CF2: Reactive Energy Pulse Output
These pins output active/reactive energy pulses.
Note: CF2 is dedicated for the 90E22/24. It should be left open for the 90E21/23.
ZX
21
O
LVTTL
ZX: Voltage Zero-Crossing Output
This pin is asserted when voltage crosses zero. Zero-crossing mode can be configured to
positive zero-crossing, negative zero-crossing or all zero-crossing by the Zxcon[1:0] bits
(MMode, 2BH).
IRQ
20
O
LVTTL
IRQ: Interrupt Output
This pin is asserted when one or more events in the SysStatus register (01H) occur. It is
deasserted when there is no bit set in the SysStatus register (01H).
WarnOut
17
O
LVTTL
WarnOut: Fatal Error Warning
This pin is asserted when there is metering parameter calibration error or voltage sag. Refer
to section 4.2.
Note 1: All digital inputs are 5V tolerant except for the OSCI pin.
Table-2 Pin Description (Continued)
Name
Pin No.
I/O
note 1
Type
Description



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