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90E21 Datasheet(PDF) 35 Page - Integrated Device Technology |
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90E21 Datasheet(HTML) 35 Page - Integrated Device Technology |
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35 / 57 page ![]() 90E21/22/23/24 SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC Register 35 January 10, 2012 QoffsetL L Line Reactive Power Offset PoffsetN N Line Active Power Offset QoffsetN N Line Reactive Power Offset Address: 38H Type: Read/Write Default Value: 0000H Bit Name Description 15 - 0 QoffsetL[15:0] L line reactive power offset. Complement, MSB is the sign bit. For calculation method, please refer to IDT application note AN-641. Address: 39H Type: Read/Write Default Value: 0000H Bit Name Description 15 - 0 PoffsetN[15:0] N line active power offset. Complement, MSB is the sign bit. For calculation method, please refer to IDT application note AN-641. Address: 3AH Type: Read/Write Default Value: 0000H Bit Name Description 15 - 0 QoffsetN[15:0] N line reactive power offset. Complement, MSB is the sign bit. For calculation method, please refer to IDT application note AN-641. 15 14 13 12 11 10 9 8 QoffsetL15 QoffsetL14 QoffsetL13 QoffsetL12 QoffsetL11 QoffsetL10 QoffsetL9 QoffsetL8 765 432 1 0 QoffsetL7 QoffsetL6 QoffsetL5 QoffsetL4 QoffsetL3 QoffsetL2 QoffsetL1 QoffsetL0 15 14 13 12 11 10 9 8 PoffsetN15 PoffsetN14 PoffsetN13 PoffsetN12 PoffsetN11 PoffsetN10 PoffsetN9 PoffsetN8 765 432 1 0 PoffsetN7 PoffsetN6 PoffsetN5 PoffsetN4 PoffsetN3 PoffsetN2 PoffsetN1 PoffsetN0 15 14 13 12 11 10 9 8 QoffsetN15 QoffsetN14 QoffsetN13 QoffsetN12 QoffsetN11 QoffsetN10 QoffsetN9 QoffsetN8 765 432 1 0 QoffsetN7 QoffsetN6 QoffsetN5 QoffsetN4 QoffsetN3 QoffsetN2 QoffsetN1 QoffsetN0 |
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