OR3C80 datasheet(17/210 Pages) AGERE

17 / 210 page

Lucent Technologies Inc.

Data Sheet

June 1999

ORCA Series 3C and 3T FPGAs

Programmable Logic Cells (continued)

The ripple mode can be used in one of four submodes.

The first of these is adder-subtractor submode. In

this submode, each LUT generates three separate out-

puts. One of the three outputs selects whether the

carry-in is to be propagated to the carry-out of the cur-

rent LUT or if the carry-out needs to be generated. If

the carry-out needs to be generated, this is provided by

the second LUT output. The result of this selection is

placed on the carry-out signal, which is connected to

the next LUT carry-in or the COUT/FCOUT signal, if it

is the last LUT (K7/K3). Both of these outputs can be

any equation created from KZ[1] and KZ[0], but in this

case, they have been set to the propagate and gener-

ate functions.

The third LUT output creates the result bit for each LUT

output connected to F[7:0]/F[3:0]. If an adder/subtrac-

tor is needed, the control signal to select addition or

subtraction is input on ASWE, with a logic 0 indicating

subtraction and a logic 1 indicating addition. The result

bit is created in one-half of the LUT from a single bit

from each input bus KZ[1:0], along with the ripple input

bit.

The second submode is the counter submode (see

Figure 7). The present count, which may be initialized

via the PFU DIN inputs to the latches/FFs, is supplied

to input KZ[0], and then output F[7:0]/F[3:0] will either

be incremented by one for an up counter or decre-

mented by one for a down counter. If an up/down

counter is needed, the control signal to select the direc-

tion (up or down) is input on ASWE with a logic 1 indi-

cating an up counter and a logic 0 indicating a down

counter. Generally, the latches/FFs in the same PFU

are used to hold the present count value.

Figure 7. Counter Submode

5-5756(F)

K7[0]

REGCOUT

COUT

K6[0]

K4[0]

K3[0]

K2[0]

K1[0]

K5[0]

K0[0]

CIN/FCIN

FCOUT

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