OR3C80 datasheet(61/210 Pages) AGERE

61 / 210 page

Lucent Technologies Inc.

Data Sheet

June 1999

ORCA Series 3C and 3T FPGAs

Special Function Blocks (continued)

ORCA Series TAP Controller (TAPC)

The

ORCA Series TAP controller (TAPC) is a 1149.1/

D1 compatible test access port controller. The 16 JTAG

state assignments from the

IEEE 1149.1/D1 specifica-

tion are used. The TAPC is controlled by TCK and

TMS. The TAPC states are used for loading the IR to

allow three basic functions in testing: providing test

stimuli (Update-DR), test execution (Run-Test/Idle),

and obtaining test responses (Capture-DR). The TAPC

allows the test host to shift in and out both instructions

and test data/results. The inputs and outputs of the

TAPC are provided in the table below. The outputs are

primarily the control signals to the instruction register

and the data register.

Table 15. TAP Controller Input/Outputs

The TAPC generates control signals that allow capture,

shift, and update operations on the instruction and data

registers. In the capture operation, data is loaded into

the register. In the shift operation, the captured data is

shifted out while new data is shifted in. In the update

operation, either the instruction register is loaded for

instruction decode, or the boundary-scan register is

updated for control of outputs.

The test host generates a test by providing input into

the

ORCA Series TMS input synchronous with TCK.

This sequences the TAPC through states in order to

perform the desired function on the instruction register

or a data register. Figure 39 provides a diagram of the

state transitions for the TAPC. The next state is deter-

mined by the TMS input value.

5-5370(F)

Figure 39. TAP Controller State Transition Diagram

Symbol

I/O

Function

TMS

Test Mode Select

TCK

Test Clock

PUR

Powerup Reset

PRGM

BSCAN Reset

TRESET

Test Logic Reset

Select

Select IR (High); Select-DR (Low)

Enable

Test Data Out Enable

Capture-DR

Capture/Parallel Load-DR

Capture-IR

Capture/Parallel Load-IR

Shift-DR

Shift Data Register

Shift-IR

Shift Instruction Register

Update-DR

Update/Parallel Load-DR

Update-IR

Update/Parallel Load-IR

SELECT-

DR-SCAN

CAPTURE-DR

SHIFT-DR

EXIT1-DR

PAUSE-DR

EXIT2-DR

UPDATE-DR

RUN-TEST/

IDLE

TEST-LOGIC-

RESET

SELECT-

IR-SCAN

CAPTURE-IR

SHIFT-IR

EXIT1-IR

PAUSE-IR

EXIT2-IR

UPDATE-IR

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