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ADSP-BF607 Datasheet(PDF) 37 Page - Analog Devices

Part # ADSP-BF607
Description  Blackfin Dual Core Embedded Processor
PDF  112 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-BF607 Datasheet(HTML) 37 Page - Analog Devices

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Rev. 0
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Page 37 of 112
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June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
ADSP-BF60x DESIGNER QUICK REFERENCE
The table provides a quick reference summary of pin related
information for circuit board design. The columns in this table
provide the following information:
• Signal Name: The Signal Name column in the table
includes the Signal Name for every pin.
• Type: The Pin Type column in the table identifies the I/O
type or supply type of the pin. The abbreviations used in
this column are na (None), I/O (Digital input and/or out-
put), a (Analog), s (Supply), and g (Ground).
• Driver Type: The Driver Type column in the table identi-
fies the driver type used by the pin. The driver types are
defined in Output Drive Currents on Page 99.
• Int Term: The Internal Termination column in the table
specifies the termination present when the processor is not
in the reset or hibernate state. The abbreviations used in
this column are wk (Weak Keeper, weakly retains previous
value driven on the pin), pu (Pull-up resistor), or pd (Pull-
down resistor).
• Reset Term: The Reset Termination column in the table
specifies the termination present when the processor is in
the reset state. The abbreviations used in this column are
wk (Weak Keeper, weakly retains previous value driven on
the pin), pu (Pull-up resistor), or pd (Pull-down resistor).
• Reset Drive: The Reset Drive column in the table specifies
the active drive on the signal when the processor is in the
reset state.
• Hiber Term: The Hibernate Termination column in the
table specifies the termination present when the processor
is in the hibernate state. The abbreviations used in this col-
umn are wk (Weak Keeper, weakly retains previous value
driven on the pin), pu (Pull-up resistor), or pd (Pull-down
resistor).
• Hiber Drive: The Hibernate Drive column in the table
specifies the active drive on the signal when the processor is
in the hibernate state.
• Power Domain: The Power Domain column in the table
specifies the power supply domain in which the signal
resides.
• Description and Notes: The Description and Notes column
in the table identifies any special requirements or charac-
teristics for the signal. If no special requirements are listed
the signal may be left unconnected if it is not used. Also, for
multiplexed general-purpose I/O pins, this column identi-
fies the functions available on the pin.
Table 15. ADSP-BF60x Designer Quick Reference
Signal Name
Type
Driver
Type
Int
Term
Reset
Term
Reset
Drive
Hiber
Term
Hiber
Drive
Power
Domain
Description
and Notes
DMC0_A00
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 0.
Notes: No notes.
DMC0_A01
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 1.
Notes: No notes.
DMC0_A02
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 2.
Notes: No notes.
DMC0_A03
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 3.
Notes: No notes.
DMC0_A04
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 4.
Notes: No notes.
DMC0_A05
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 5.
Notes: No notes.
DMC0_A06
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 6.
Notes: No notes.
DMC0_A07
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 7.
Notes: No notes.
DMC0_A08
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 8.
Notes: No notes.
DMC0_A09
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 9.
Notes: No notes.
DMC0_A10
I/O
B
none
none
none
none
none
VDD_DMC
Desc: DMC0 Address 10.
Notes: No notes.



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