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ADSP-BF607 Datasheet(PDF) 82 Page - Analog Devices

Part # ADSP-BF607
Description  Blackfin Dual Core Embedded Processor
PDF  112 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-BF607 Datasheet(HTML) 82 Page - Analog Devices

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Rev. 0
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Page 82 of 112
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June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
Table 50. Serial Ports—External Late Frame Sync
VDD_EXT
1.8V Nominal
VDD_EXT
3.3V Nominal
Parameter
Min
Max
Min
Max
Unit
Switching Characteristics
tDDTLFSE
Data Delay from Late External Transmit Frame Sync or External
Receive Frame Sync with MCE = 1, MFD = 0
1
18.8
14
ns
tDDTENFS
Data Enable for MCE = 1, MFD = 0
1
0.5
0.5
ns
1 The tDDTLFSE and tDDTENFS parameters apply to left-justified as well as standard serial mode, and MCE = 1, MFD = 0.
Figure 34. External Late Frame Sync
DRIVE
SAMPLE
2ND BIT
1ST BIT
DRIVE
tDDTE/I
tHDTE/I
tDDTLFSE
tDDTENFS
tSFSE/I
tHFSE/I
SPT_A/BDx
(DATA CHANNEL A/B)
SPT_A/BFS
(FRAME SYNC)
SPT_A/BCLK
(SPORT CLOCK)



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