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ADSP-BF607 Datasheet(PDF) 12 Page - Analog Devices

Part # ADSP-BF607
Description  Blackfin Dual Core Embedded Processor
PDF  112 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADSP-BF607 Datasheet(HTML) 12 Page - Analog Devices

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Rev. 0
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Page 12 of 112
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June 2013
ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609
being reset by software. The programmer initializes the count
value of the timer, enables the appropriate interrupt, then
enables the timer. Thereafter, the software must reload the
counter before it counts to zero from the programmed value.
This protects the system from remaining in an unknown state
where software, which would normally reset the timer, has
stopped running due to an external noise condition or software
error.
After a reset, software can determine if the watchdog was the
source of the hardware reset by interrogating a status bit in the
timer control register, which is set only upon a watchdog gener-
ated reset.
3-Phase PWM Units
The Pulse Width Modulator (PWM) module is a flexible and
programmable waveform generator. With minimal CPU inter-
vention the PWM peripheral is capable of generating complex
waveforms for motor control, Pulse Coded Modulation (PCM),
Digital to Analog Conversion (DAC), power switching and
power conversion. The PWM module has 4 PWM pairs capable
of 3-phase PWM generation for source inverters for AC induc-
tion and DC brush less motors.
The two 3-phase PWM generation units each feature:
• 16-bit center-based PWM generation unit
•Programmable PWM pulse width
• Single update mode with option for asymmetric duty
• Programmable dead time and switching frequency
• Twos-complement implementation which permits smooth
transition to full ON and full OFF states
• Dedicated asynchronous PWM shutdown signal
Link Ports
Four DMA-enabled, 8-bit-wide link ports can connect to the
link ports of other DSPs or processors. Link ports are bidirec-
tional ports having eight data lines, an acknowledge line and a
clock line.
Serial Ports (SPORTs)
Three synchronous serial ports that provide an inexpensive
interface to a wide variety of digital and mixed-signal peripheral
devices such as Analog Devices’ AD183x family of audio codecs,
ADCs, and DACs. The serial ports are made up of two data
lines, a clock, and frame sync. The data lines can be pro-
grammed to either transmit or receive and each data line has a
dedicated DMA channel.
Serial port data can be automatically transferred to and from
on-chip memory/external memory via dedicated DMA chan-
nels. Each of the serial ports can work in conjunction with
another serial port to provide TDM support. In this configura-
tion, one SPORT provides two transmit signals while the other
SPORT provides the two receive signals. The frame sync and
clock are shared.
Serial ports operate in five modes:
• Standard DSP serial mode
•Multichannel (TDM) mode
•I2S mode
•Packed I2S mode
• Left-justified mode
ACM Interface
The ADC control module (ACM) provides an interface that
synchronizes the controls between the processor and an analog-
to-digital converter (ADC). The analog-to-digital conversions
are initiated by the processor, based on external or internal
events.
The ACM allows for flexible scheduling of sampling instants
and provides precise sampling signals to the ADC.
Figure 5 shows how to connect an external ADC to the ACM
and one of the SPORTs.
The ACM synchronizes the ADC conversion process, generat-
ing the ADC controls, the ADC conversion start signal, and
other signals. The actual data acquisition from the ADC is done
by a peripheral such as a SPORT or a SPI.
The processor interfaces directly to many ADCs without any
glue logic required.
General-Purpose Counters
A 32-bit counter is provided that can operate in general-pur-
pose up/down count modes and can sense 2-bit quadrature or
binary codes as typically emitted by industrial drives or manual
thumbwheels. Count direction is either controlled by a level-
sensitive input pin or by two edge detectors.
Figure 5. ADC, ACM, and SPORT Connections
SPORTx
SPT_AD1
SPT_AD0
SPT_CLK
SPT_FS
ADC
DOUTB
DOUTA
ADSCLK
CS
RANGE
SGL/
DIFF
A[2:0]
ACM
ACM_FS
ACM_CLK
ACM_A4
ACM_A3
ACM_A[2:0]
ADSP-BF60x
SPORT
SELECT
MUX



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