ADSP-BF607 datasheet(92/112 Pages) AD

92 / 112 page

Rev. 0

Page 92 of 112

June 2013

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609

Up/Down Counter/Rotary Encoder Timing

Pulse Width Modulator (PWM) Timing

Table 60 and Figure 47 describe PWM operations.

Table 59. Up/Down Counter/Rotary Encoder Timing

VDD_EXT

1.8V Nominal

VDD_EXT

3.3V Nominal

Parameter

Min

Max

Min

Max

Unit

Timing Requirement

tWCOUNT

Up/Down Counter/Rotary Encoder Input Pulse Width 2 × tSCLK0

2 × tSCLK0

Figure 46. Up/Down Counter/Rotary Encoder Timing

CNT_UD

CNT_DG

CNT_ZM

tWCOUNT

Table 60. PWM Timing

VDD_EXT

1.8V Nominal

VDD_EXT

3.3V Nominal

Parameter

Min

Max

Min

Max

Unit

Timing Requirement

tES

External Sync Pulse Width

2 × tSCLK0

Switching Characteristics

tDODIS

Output Inactive (OFF) After Trip Input1

tDOE

Output Delay After External Sync1, 2

2 × tSCLK0 + 5.5

5 × tSCLK0 + 14

1 PWM outputs are: PWMx_AH, PWMx_AL, PWMx_BH, PWMx_BL, PWMx_CH, and PWMx_CL.

2 When the external sync signal is synchronous to the peripheral clock, it takes fewer clock cycles for the output to appear compared to when the external sync signal is

asynchronous to the peripheral clock. For more information, see the ADSP-BF60x Blackfin Processor Hardware Reference.

Figure 47. PWM Timing

PWM_TRIP

PWM_SYNC

(AS INPUT)

tES

tDOE

OUTPUT

tDODIS

ADSP-BF607 Datasheet(PDF) 92 Page - Analog Devices

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