S25FS256S datasheet(34/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

Figure 5.1 Maximum Negative Overshoot Waveform

Figure 5.2 Maximum Positive Overshoot Waveform

5.4

Power-Up and Power-Down

The device must not be selected at power-up or power-down (that is, CS# must follow the voltage applied on

VDD) until VDD reaches the correct value as follows:

 V

DD (min) at power-up, and then for a further delay of tPU

 V

SS at power-down

A simple pull-up resistor on Chip Select (CS#) can usually be used to insure safe and proper power-up and

power-down.

The device ignores all instructions until a time delay of tPU has elapsed after the moment that VDD rises above

the minimum VDD threshold (see Figure 5.3). However, correct operation of the device is not guaranteed if

VDD returns below VDD (min) during tPU. No command should be sent to the device until the end of tPU.

The device draws IPOR during tPU. After power-up (tPU), the device is in Standby mode, draws CMOS standby

current (ISB), and the WEL bit is reset.

During power-down or voltage drops below VDD(cut-off), the voltage must drop below VDD(low) for a period of

tPD for the part to initialize correctly on power-up. See Figure 5.4. If during a voltage drop the VDD stays

above VDD(cut-off) the part will stay initialized and will work correctly when VDD is again above VDD(min). In

the event Power-On Reset (POR) did not complete correctly after power-up, the assertion of the RESET#

signal or receiving a software reset command (RESET) will restart the POR process.

Normal precautions must be taken for supply rail decoupling to stabilize the VDD supply at the device. Each

device in a system should have the VDD rail decoupled by a suitable capacitor close to the package supply

connection (this capacitor is generally of the order of 0.1 µf).

VSS to VDD

- 1.0V

≤ 20 ns

VDD + 1.0V

≤ 20 ns

VSS to VDD

Table 5.3 FS-S Power-Up / Power-Down Voltage and Timing

Symbol

Parameter

Min

Max

Unit

VDD (min)

VDD (minimum operation voltage)

1.7

VDD (cut-off)

VDD (Cut 0ff where re-initialization is needed)

1.5

VDD (low)

VDD (low voltage for initialization to occur)

0.7

tPU

VDD(min) to Read operation

300

µs

tPD

VDD(low) time

10.0

µs

S25FS256S Datasheet(PDF) 34 Page - SPANSION

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