S25FS256S datasheet(60/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

8.6.1

Status Register 1

8.6.1.1

Status Register 1 Non-Volatile (SR1NV)

Related Commands: Write Registers (WRR 01h), Read Any Register (RDAR 65h), Write Any Register

(WRAR 71h)

Status Register Write Non-Volatile (SRWD_NV) SR1NV[7]: Places the device in the Hardware Protected

mode when this bit is set to 1 and the WP# input is driven low. In this mode, the Write Registers (WRR) and

Write Any Register (WRAR) commands (that select Status Register 1 or Configuration Register 1) are

ignored and not accepted for execution, effectively locking the state of the Status Register 1 and

Configuration Register 1 (SR1NV, SR1V, CR1NV, or CR1V) bits, by making the registers read-only. If WP# is

high, Status Register 1 and Configuration Register 1 may be changed by the WRR or WRAR commands. If

SRWD_NV is 0, WP# has no effect and Status Register 1 and Configuration Register 1 may be changed by

the WRR or WRAR commands. WP# has no effect on the writing of any other registers. The SRWD_NV bit

has the same non-volatile endurance as the main flash array. The SRWD (SR1V[7]) bit serves only as a copy

of the SRWD_NV bit to provide zero read latency.

Program Error Default (P_ERR_D) SR1NV[6]: Provides the default state for the Programming Error Status

in SR1V[6]. This bit is not user programmable.

Erase Error (E_ERR) SR1V[5]: Provides the default state for the Erase Error Status in SR1V[5]. This bit is

not user programmable.

Block Protection (BP_NV2, BP_NV1, BP_NV0) SR1NV[4:2]: These bits define the main flash array area to

be software-protected against Program and Erase commands. The BP bits are selected as either volatile or

non-volatile, depending on the state of the BP non-volatile bit (BPNV_O) in the Configuration Register

CR1NV[3]. When CR1NV[3]=0 the non-volatile version of the BP bits (SR1NV[4:2]) are used to control Block

Protection and the WRR command writes SR1NV[4:2] and updates SR1V[4:2] to the same value. When

CR1NV[3]=1 the volatile version of the BP bits (SR1V[4:2]) are used to control Block Protection and the WRR

command writes SR1V[4:2] and does not affect SR1NV[4:2]. When one or more of the BP bits is set to 1, the

relevant memory area is protected against Program and Erase. The Bulk Erase (BE) command can be

executed only when the BP bits are cleared to 0’s. See Section 9.3, Block Protection on page 77 for a

description of how the BP bit values select the memory array area protected. The non-volatile version of the

BP bits have the same non-volatile endurance as the main flash array.

Write Enable Latch Default (WEL_D) SR1NV[1]: Provides the default state for the WEL Status in SR1V[1].

This bit is programmed by Spansion and is not user programmable.

Write-In-Progress Default (WIP_D) SR1NV[0]: Provides the default state for the WIP Status in SR1V[0].

This bit is programmed by Spansion and is not user programmable.

Table 8.14 Status Register 1 Non-Volatile (SR1NV)

Bits

Field Name

Function

Type

Default State

Description

SRWD_NV

Status Register

Write Disable

Default

Non-Volatile

1 = Locks state of SRWD, BP, and Configuration

or WRAR commands that would affect SR1NV, SR1V,

CR1NV, or CR1V.

0 = No protection, even when WP# is low.

P_ERR_D

Programming

Error Default

Non-Volatile

Read Only

Provides the default state for the Programming Error

Status. Not user programmable.

E_ERR_D

Erase Error

Default

Non-Volatile

Read Only

Provides the default state for the Erase Error Status. Not

user programmable.

BP_NV2

Block

Protection

Non-Volatile

000b

Protects the selected range of sectors (Block) from

Program or Erase when the BP bits are configured as

non-volatile (CR1NV[3]=0). Programmed to 111b when

BP bits are configured to volatile (CR1NV[3]=1).- after

which these bits are no longer user programmable.

BP_NV1

BP_NV0

WEL_D

WEL Default

Non-Volatile

Read Only

Provides the default state for the WEL Status. Not user

programmable.

WIP_D

WIP Default

Non-Volatile

Read Only

Provides the default state for the WIP Status. Not user

programmable.

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