S25FS256S datasheet(58/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

8.5

OTP Address Space

Each FS-S family memory device has a 1024-byte One-Time Program (OTP) address space that is separate

from the main flash array. The OTP area is divided into 32, individually lockable, 32-byte aligned and length

regions.

In the 32-byte region starting at address zero:

 The 16 lowest address bytes are programmed by Spansion with a 128-bit random number. Only Spansion

is able to program zeros in these bytes. Programming ones in these byte locations is ignored and does not

affect the value programmed by Spansion. Attempting to program any zero in these byte locations will fail

and set P_ERR.

 The next 4 higher address bytes (OTP Lock Bytes) are used to provide one bit per OTP region to

permanently protect each region from programming. The bytes are erased when shipped from Spansion.

After an OTP region is programmed, it can be locked to prevent further programming, by programming the

related protection bit in the OTP Lock Bytes.

 The next higher 12 bytes of the lowest address region are Reserved for Future Use (RFU). The bits in

these RFU bytes may be programmed by the host system but it must be understood that a future device

may use those bits for protection of a larger OTP space. The bytes are erased when shipped from

Spansion.

The remaining regions are erased when shipped from Spansion, and are available for programming of

additional permanent data.

Refer to Figure 8.1, OTP Address Space on page 58 for a pictorial representation of the OTP memory space.

The OTP memory space is intended for increased system security. OTP values, such as the random number

programmed by Spansion, can be used to “mate” a flash component with the system CPU/ASIC to prevent

device substitution.

The Configuration Register FREEZE (CR1V[0]) bit protects the entire OTP memory space from programming

when set to 1. This allows trusted boot code to control programming of OTP regions then set the FREEZE bit

to prevent further OTP memory space programming during the remainder of normal power-on system

operation.

Figure 8.1 OTP Address Space

32-byte OTP Region 31

32-byte OTP Region 30

32-byte OTP Region 29

32-byte OTP Region 3

32-byte OTP Region 2

32-byte OTP Region 1

32-byte OTP Region 0

16-byte Random Number

Lock Bits 31 to 0

Reserved

Region 0 Expanded View

When programmed to 0, each

lock bit protects its related

32-byte OTP region from any

further programming

...

Byte 0h

Byte 10h

Byte 1Fh

S25FS256S Datasheet(PDF) 58 Page - SPANSION

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