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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

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(Pre limin ar y)

Software Interface

This section discusses the features and behaviors most relevant to host system software that interacts with

S25FS-S family memory devices.

Address Space Maps

8.1

Overview

8.1.1

Extended Address

The S25FS-S family supports 32-bit (4-byte) addresses to enable higher density devices than allowed by

previous generation (legacy) SPI devices that supported only 24-bit (3-byte) addresses. A 24-bit, byte

resolution, address can access only 16-Mbytes (128-Mbits) maximum density. A 32-bit, byte resolution,

address allows direct addressing of up to a 4-Gbytes (32-Gbits) address space.

Legacy commands continue to support 24-bit addresses for backward software compatibility. Extended 32-bit

addresses are enabled in two ways:

 Extended address mode — a volatile Configuration Register bit that changes all legacy commands to

expect 32 bits of address supplied from the host system.

 4-byte address commands — that perform both legacy and new functions, which always expect 32-bit

address.

The default condition for extended address mode, after power-up or reset, is controlled by a non-volatile

configuration bit. The default extended address mode may be set for 24- or 32-bit addresses. This enables

legacy software compatible access to the first 128 Mbits of a device or for the device to start directly in 32-bit

address mode.

The 128-Mbit density member of the S25FS-S family supports the extended address features in the same

way but in essence ignores bits 31 to 24 of any address because the main flash array only needs 24 bits of

address. This enables simple migration from the 128-Mb density to higher density devices without changing

the address handling aspects of software.

8.1.2

Multiple Address Spaces

Many commands operate on the main flash memory array. Some commands operate on address spaces

separate from the main flash array. Each separate address space uses the full 24- or 32-bit address but may

only define a small portion of the available address space.

8.2

Flash Memory Array

The main flash array is divided into erase units called physical sectors.

The FS-S family physical sectors may be configured as a hybrid combination of eight 4-kB parameter sectors

at the top or bottom of the address space with all but one of the remaining sectors being uniform size.

Because the group of eight 4-kB parameter sectors is in total smaller than a uniform sector, the group of 4-kB

physical sectors respectively overlay (replace) the top or bottom 32 kB of the highest or lowest address

uniform sector.

The Parameter Sector Erase commands (20h or 21h) must be used to erase the 4-kB sectors individually.

The Sector (uniform block) Erase commands (D8h or DCh) must be used to erase any of the remaining

sectors, including the portion of highest or lowest address sector that is not overlaid by the parameter sectors.

The uniform block erase command has no effect on parameter sectors.

Configuration Register 1 non-volatile bit 2 (CR1NV[2]) equal to 0 overlays the parameter sectors at the

bottom of the lowest address uniform sector. CR1NV[2] = 1 overlays the parameter sectors at the top of the

highest address uniform sector. See Section 8.6, Registers on page 59 for more information.

There is also a configuration option to remove the 4-kB parameter sectors from the address map so that all

sectors are uniform size. Configuration Register 3 volatile bit 3 (CR3V[3]) equal to 0 selects the hybrid sector

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