S25FS256S datasheet(64/154 Pages) SPANSION

64 / 154 page

S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

to a 0 when it ships from Spansion. If TBPARM_O is programmed to 1, writing the bit with a 0 does not

change the value or set the Program Error bit (P_ERR in SR1V[6]).

The desired state of TBPARM_O must be selected during the initial configuration of the device during system

manufacture; before the first program or erase operation on the main flash array. TBPARM_O must not be

programmed after programming or erasing is done in the main flash array.

TBPROT_O can be set or cleared independent of the TBPARM_O bit. Therefore, the user can elect to store

parameter information from the bottom of the array and protect boot code starting at the top of the array, or

vice versa. Or, the user can elect to store and protect the parameter information starting from the top or

bottom together.

When the memory array is configured as uniform sectors, the TBPARM_O bit is Reserved for Future Use

(RFU) and has no effect because all sectors are uniform size.

Quad Data Width Non-Volatile (QUAD_NV) CR1NV[1]: Provides the default state for the Quad bit in

CR1V[1]. The WRR or WRAR command affects this bit. Non-Volatile selection of QPI Mode, by programming

CR2NV[6] =1, will also program QUAD_NV =1 to change the non-volatile default to Quad data width mode.

While QPI Mode is selected by CR2V[6]=1, the Quad_NV bit cannot be cleared to 0.

Freeze Protection Default (FREEZE) CR1NV[0]: Provides the default state for the FREEZE bit in CR1V[0].

This bit is not user programmable.

8.6.3.2

Configuration Register 1 Volatile (CR1V)

Related Commands: Read Configuration Register (RDCR 35h), Write Registers (WRR 01h), Read Any

command.

TBPROT, BPNV, and TBPARM CR1V[5,3,2]: These bits are volatile copies of the related non-volatile bits of

CR1NV. These bits track any changes to the related non-volatile version of these bits.

Quad Data Width (QUAD) CR1V[1]: When set to 1, this bit switches the data width of the device to 4-bit

Quad Mode. That is, WP# becomes IO2 and IO3 / RESET# becomes an active I/O signal when CS# is low or

the RESET# input when CS# is high. The WP# input is not monitored for its normal function and is internally

set to high (inactive). The commands for Serial, and Dual I/O Read still function normally but, there is no need

to drive the WP# input for those commands when switching between commands using different data path

widths. Similarly, there is no requirement to drive the IO3 / RESET# during those commands (while CS# is

low). The QUAD bit must be set to 1 when using the Quad I/O Read, DDR Quad I/O Read, QPI Mode

(CR2V[6] = 1), and Read Quad ID commands. While QPI Mode is selected by CR2V[6]=1, the Quad bit

cannot be cleared to 0. The WRR command writes the non-volatile version of the Quad bit (CR1NV[1]), which

also causes an update to the volatile version CR1V[1]. The WRR command can not write the volatile version

CR1V[1] without first affecting the non-volatile version CR1NV[1]. The WRAR command must be used when

it is desired to write the volatile Quad bit CR1V[1] without affecting the non-volatile version CR1NV[1].

Table 8.18 Configuration Register 1 Volatile (CR1V)

Bits

Field Name

Function

Type

Default

State

Description

RFU

Reserved for Future

Use

Volatile

CR1NV

Reserved.

RFU

TBPROT

Volatile copy of

TBPROT_O

Volatile

Read Only

Not user writable.

See CR1NV[5] TBPROT_O.

RFU

Reserved for Future

Use

RFU

Reserved.

BPNV

Volatile copy of

BPNV_O

Volatile

Read Only

Not user writable.

See CR1NV[3] BPNV_O.

TBPARM

Volatile copy of

TBPARM_O

Volatile

Read Only

Not user writable.

See CR1NV[2] TBPARM_O.

QUAD

Quad I/O Mode

Volatile

1 = Quad.

0 = Dual or Serial.

FREEZE

Lock-Down Block

Protection until next

power cycle

Volatile

Lock current state of Block Protection control bits, and

OTP regions.

1 = Block Protection and OTP locked.

0 = Block Protection and OTP unlocked.

S25FS256S Datasheet(PDF) 64 Page - SPANSION

S25FS256S Datasheet(HTML) 64 Page - SPANSION

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL