AM8530 datasheet(162/194 Pages) AMD

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SCC Application Notes

AMD

7–13

WR12 & WR13 select the baud-rate generator time constant. The time constant is deter-

mined by the equation:

Time Constant =

Clock Frequency

2 x Baud Rate x clock mode

–2

In this example, the clock frequency is 2.4576 MHz, the baud rate is 9600, and the clock

mode is 16; the time constant is 6. Converting this time constant to a 16-bit hexadecimal

number, it becomes 0006H. The time constant Low (WR12) is 06H and the time constant

High (WR13) is 00H. The baud rate for this example can be varied for as long as the data

rate is less than 1/4 of the PCLK rate. Table 7–7 gives the time constants for other com-

mon baud rates.

Table 7–7. Time Constants for Common Baud Rates

Baud

Divider

Rate

Dec

Hex

38400

0000H

19200

0002H

9600

0006H

4800

000EH

2400

001EH

1200

003EH

600

126

007EH

300

254

00FEH

150

510

01FEH

For 2.4576 MHz Clock, X16 Clock Mode

WR14 selects the baud rate source as the

RTxC pin, baud rate generator disabled, and

internal loopback. The baud-rate generator will use the

RTxC pin as the clock source for

the baud-rate generator. The baud-rate generator is not enabled at this time because the

SCC initialization is not complete.

7.3.3.2

SCC Operating Mode Enables

WR14 enables the baud-rate generator. Bit 0 (LSB) is changed to a 1 to enable the baud-

rate generator; all other bits must maintain the value selected during initialization.

WR3 enables the receiver. Bit 0 (LSB) is changed to a 1 to enable the receiver; all other

bits must maintain the value selected during initialization.

WR5 enables the transmitter. Bit 3 is changed to a 1 to enable the transmitter; all other

bits must maintain the value selected during initialization.

7.3.3.3

SCC Operating Mode Interrupts

WR1 enables the Tx and the Rx interrupts. The Rx interrupt is programmed to generate

an interrupt on all received characters or special conditions. This provides an interrupt on

every character received by the SCC. The external/status interrupts are not enabled in

this application.

WR9 sets the master interrupt enable (MIE) bit 3. Setting this bit enables the interrupts

pending to generate and interrupt on the

INT pin.

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