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AFE5807 Datasheet(PDF) 34 Page - Texas Instruments |
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AFE5807 Datasheet(HTML) 34 Page - Texas Instruments |
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34 / 75 page  AFE5807 SLOS703C – SEPTEMBER 2010 – REVISED MAY 2013 www.ti.com SCLK clock cycles + 4 ADC clock cycles. To change the customer pattern value, users can repeat writing Register 5[13:0] with a new value. Due to the speed limit of SPI, the refresh rate of the custom pattern may not be high. For example, 128 points custom pattern will take approximately 128 x (24 SCLK clock cycles + 4 ADC clock cycles). NOTE only one of the above patterns can be active at any given instant. SYNC: Address: 10[8] By enabling this bit, all channels' test pattern outputs are synchronized. When 10[8] is set as 1, the ramp patterns of all 8 channels start simultaneously. 34 Submit Documentation Feedback Copyright © 2010–2013, Texas Instruments Incorporated Product Folder Links: AFE5807 |
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