AFE5807 datasheet(48/75 Pages) TI1

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I/Q CLK

Generator

4X/8X Clock

D Q

INV

1X Clock

LNA1

Weight

LNA2~8

In-phase

CLK

Quadrature

CLK

I/V

Summed

In-Phase

Summed

Quadrature

delayed

(t)

I cos

Q sin

(t)

Q cos

I sin

AFE5807

SLOS703C – SEPTEMBER 2010 – REVISED MAY 2013

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Good phase accuracy and matching are also maintained. Quadature clock generator is used to create in-phase

and quadrature clocks with exact 90° phase difference. The only difference between 8 × ƒcw and 4 × ƒcw modes

is the accessibility of the 3rd and 5th harmonic suppression filter. In the 8 × ƒcw mode, the suppression filter can

be supported. In both modes,

phase delay resolution is achieved by weighting the in-phase and quadrature

paths correspondingly. For example, if a delay of

or 22.5° is targeted, the weighting coefficients should

follow the below equations, assuming Iin and Qin are sin(ω0t) and cos(ω0t) respectively:

(4)

Therefore after I/Q mixers, phase delay in the received signals is compensated. The mixers outputs from all

channels are aligned and added linearly to improve the signal to noise ratio. It is preferred to have the 4 × ƒcw or

8 × ƒcw and 1 × ƒcw clocks aligned both at the rising edge.

Figure 74. 8 X ƒcw and 4 X ƒcw Block Diagram

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