UM0434 datasheet(270/390 Pages) STMICROELECTRONICS

Part #	UM0434

Description	The primary objective of this user?셲 manual is to describe

PDF	390 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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270 / 390 page

UM0434

External core complex interfaces

271/391

Read and write transfers

Figure 37 shows a sequence of read and write cycles.

Figure 37.

Single-Cycle reads, Single-Cycle write, full pipelining

The first read request (addrx) is taken at the end of cycle C1 because the bus is idle. The

second read request (addry) is taken at the end of C2 because a ready/OKAY response is

asserted during C2 for the first read access (addrx). During C3, a request is generated for a

write to addry which is taken at the end of C3 because the second access is terminating.

Data for the addrz write cycle is driven in C4, the cycle after the access is taken, and a

ready/OKAY response is signaled to complete the write cycle to addrz.

nonseq

idle

addr x

addr y

addr z

single

data x

data y

data z

okay

m_clk

p_htrans

p_addr,p_hprot

p_hsize,

p_hbstrb, etc

p_hburst

p_hunalign

p_hwrite

p_hrdata

p_hwdata

p_hready

p_hresp

UM0434 Datasheet(PDF) 270 Page - STMicroelectronics