UM0434 datasheet(305/390 Pages) STMICROELECTRONICS

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Debug support

UM0434

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controller if one is present in the system. Thus, the core module can be easily integrated

with existing JTAG designs or as a stand-alone controller.

To enable full OnCE operation, the

jd_enable_once input signal must be asserted. In some

system integrations, this is automatic since the input will be tied asserted. Other integrations

may require the execution of the Enable OnCE command through the TAP and appropriate

entry of serial data. Refer to the documentation for the integrating device. The

jd_enable_once input should not change state during a debug session, or undefined activity

may occur.

Figure 67 shows the TAP controller and TAP registers implemented by the OnCE logic.

Figure 66.

Core debug resources

Figure 67.

OnCE TAP controller and registers

The OnCE controller is implemented as a 16-state finite state machine (FSM), shown in

Figure 68, with a one-to-one correspondence to the states defined for the JTAG TAP

controller.

OnCE Mapped Debug Registers

Auxiliary Data Registers

External Data Registers

Bypass Register

TAP Instruction Register

TAP

Controller

j_trst_b

j_tclk

j_tms

TDO

Mux Logic

j_tdi

j_tdo

j_tdo_en

(OnCE OCMD)

UM0434 Datasheet(PDF) 305 Page - STMicroelectronics