AN4650 datasheet(79/102 Pages) STMICROELECTRONICS

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AN4650

First-in first-out (FIFO) buffer

102

the two interrupt pins by setting to 1 the INT1_FIFO_OVR bit of the INT1_CTRL



FIFO_FULL is is set high when the next set of data that will be stored in FIFO will make

the FIFO full. The next stored sample will replace the oldest FIFO sample. This signal

can be driven to the two interrupt pins by setting to 1 the INT1_FULL_FLAG bit of the

INT1_CTRL register or the INT2_FULL_FLAG bit of the INT2_CTRL register.



FIFO_EMPTY is set high when the FIFO is empty.



DIFF_FIFO_[11:8] contains the upper part of the number of unread words (16-bit data)

stored in the FIFO. The lower part is represented by the DIFF_FIFO_[7:0] bits in

FIFO_STATUS1. The value of DIFF_FIFO_[11:0] field corresponds to the number of

samples in the FIFO (each sample is represented as 16-bit data). When a FIFO full

event occurs (FIFO_FULL bit is set high), the value of the DIFF_FIFO_[11:0] field is set

to 0.

illustrated in Table 66.

8.1.8

FIFO_STATUS3 (3Ch)

The FIFO_STATUS3 register, together with FIFO_STATUS4 register, specifies which axis of

which sensor data will be read at the next reading. For more information on how to retrieve

data from the FIFO see Section 8.5.

Table 66. FIFO_STATUS2 behavior

FIFO_OVER_

RUN

FIFO_FULL

FIFO_EMPTY

DIFF_FIFO_

[11:0]

Number of FIFO

samples

FIFO

trigger

timing

0010

0001

0002

...

4095

t_full - 1

0100

4096

t_full

1100

4096

(old sample

overwritten)

t_full + 1

Table 67. FIFO_STATUS3 register

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

FIFO_

PATTERN

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