AN4650 datasheet(84/102 Pages) STMICROELECTRONICS

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First-in first-out (FIFO) buffer

AN4650

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DocID027415 Rev 1

8.2.4

Continuous-to-FIFO mode

This mode is a combination of the Continuous and FIFO modes previously described. In

Continuous-to-FIFO mode, the FIFO buffer starts operating in Continuous mode and

switches to FIFO mode when an event condition occurs.

The event condition can be one of the following:



Significant Motion: event detection has to be configured and the INT1_SIG_MOT bit of

the INT1_CTRL register has to be set to 1;



Tilt: event detection has to be configured and the INT2_TILT bit of the MD2_CFG



Step detection: event detection has to be configured and the INT1_STEP_DETECTOR

bit of the INT1_CTRL register has to be set to 1;



Single tap: event detection has to be configured and the INT2_SINGLE_TAP bit of the

MD2_CFG register has to be set to 1;



Double tap: event detection has to be configured and the INT2_DOUBLE_TAP bit of

the MD2_CFG register has to be set to 1;



Free-fall: event detection has to be configured and the INT2_FF bit of the MD2_CFG



Wake-up: event detection has to be configured and the INT2_WU bit of the MD2_CFG



6D: event detection has to be configured and the INT2_6D bit of the MD2_CFG register

has to be set to 1.

Continuous-to-FIFO mode is sensitive to the level of the interrupt signal and not to the edge,

which means that if Continuous-to-FIFO is in FIFO mode and the interrupt condition

disappears, the FIFO buffer returns to Continuous mode. It is recommended to latch the

interrupt signal used as the FIFO event in order to avoid losing interrupt events (the interrupt

signal has to be driven to the interrupt pin so that the latch function takes effect).

Figure 26. Continuous-to-FIFO mode

AN4650 Datasheet(PDF) 84 Page - STMicroelectronics